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?200 8 fairchild semiconductor corporation fdp8 880 / fdb8880 rev. a 1 0 www.fairchildsemicom fdp8880 / fdb8880 1 fdp8880 / fdb8880 n-channel powertrench ? mosfet 30v, 54a, 11.6m ? features r ds(on) = 14.5m ? , v gs = 4.5v, i d = 40a r ds(on) = 11.6m ? , v gs = 10v, i d = 40a high performance trench technology for extremely low r ds(on) low gate charge high power and current handling capability rohs complicant general description this n-channel mosfet has been designed specifically to improve the overall efficiency of dc/dc converters using either synchronous or conventional switching pwm controllers. it has been optimized for low gate charge, low r ds(on) and fast switching speed. to-263ab fdb series gate source drain (flange) to-220ab fdp series d g s drain drain gate source (flange) application ? dc / dc conver ter s tmm may 2008
? 2008 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 2 mosfet maximum ratings t c = 25c unless otherwise noted thermal characteristics package marking and ordering information electrical characteristics t c = 25c unless otherwise noted off characteristics on characteristics symbol parameter ratings units v dss drain to source voltage 30 v v gs gate to source voltage 20 v i d drain current 54 a continuous (t c = 25 o c, v gs = 10v) continuous (t c = 25 o c, v gs = 4.5v) 48 a continuous (t amb = 25 o c, v gs = 10v, with r ja = 43 o c/w) 11 a pulsed figure 4 a e as single pulse avalanche energy (note 1) 31 mj p d power dissipation 55 w derate above 25 o c0 . 3 7 w / o c t j , t stg operating and storage temperature -55 to 175 o c r jc thermal resistance junction to case to-220,to-263 2.73 o c/w r ja thermal resistance junction to ambient to-220,to-262 ( note 2) 62 o c/w r ja thermal resistance junction to ambient to-263, 1in 2 copper pad area 43 o c/w device marking device package reel size tape width quantity fdp8880 fdp8880 to-220ab tube n/a 50 units fdb8880 fdb8880 to-263ab 330mm 24mm 800 units f f symbol parameter test conditions min typ max units b vdss drain to source breakdown voltage i d = 250 a, v gs = 0v 30 - - v i dss zero gate voltage drain current v ds = 24v - - 1 a v gs = 0v t c = 150 o c- -250 i gss gate to source leakage current v gs = 20v - - 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a 1.2 - 2.5 v r ds(on) drain to source on resistance i d = 40a, v gs = 10v - 0.0095 0.0116 ? i d = 40a, v gs = 4.5v - 0.012 0.0145 i d = 40a, v gs = 10v, t j = 175 o c - 0.015 0.019
? 2008 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 3 dynamic characteristics switching characteristics (v gs = 10v) drain-source diode characteristics notes: 1: starting t j = 25c, l = 34uh, i as = 43a,vdd = 27v, vgs = 10v. 2: pulse width = 100s. 3 c iss input capacitance v ds = 15v, v gs = 0v, f = 1mhz - 1240 - pf c oss output capacitance - 255 - pf c rss reverse transfer capacitance - 147 - pf r g gate resistance v gs = 0.5v, f = 1mhz - 2.7 - ? q g(tot) total gate charge at 10v v gs = 0v to 10v v dd = 15v i d = 40a i g = 1.0ma -2229nc q g(5) total gate charge at 5v v gs = 0v to 5v - 12 16 nc q g(th) threshold gate charge v gs = 0v to 1v - 1.6 2.1 nc q gs gate to source gate charge - 3.2 - nc q gs2 gate charge threshold to plateau - 2.0 - nc q gd gate to drain ?miller? charge - 4.8 - nc t on turn-on time v dd = 15v, i d = 40a v gs = 10v, r gs = 13.6 ? --171ns t d(on) turn-on delay time - 8 - ns t r rise time - 107 - ns t d(off) turn-off delay time - 47 - ns t f fall time - 51 - ns t off turn-off time - - 147 ns v sd source to drain diode voltage i sd = 40a - - 1.25 v i sd = 3.5a - - 1.0 v t rr reverse recovery time i sd = 40a, di sd /dt = 100a/ s- - 27ns q rr reverse recovered charge i sd = 40a, di sd /dt = 100a/ s- - 18nc
? 2008 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 4 typical characteristics t c = 25c unless otherwise noted figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized maximum transient thermal impedance figure 4. peak current capability t c , case temperature ( o c) power dissipation multiplier 0 0255075100 175 0.2 0.4 0.6 0.8 1.0 1.2 125 150 i d , drain current (a) t c , case temperature ( o c) 0 20 40 60 25 50 75 100 125 150 175 0.1 1 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 0.01 2 t, rectangular pulse duration (s) z jc , normalized thermal impedance notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc x r jc + t c p dm t 1 t 2 0.5 0.2 0.1 0.05 0.01 0.02 duty cycle - descending order single pulse 100 600 50 i dm , peak current (a) t, pulse width (s) 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t c = 25 o c i = i 25 175 - t c 150 for temperatures above 25 o c derate peak current as follows: transconductance may limit current in this region v gs = 4.5v v gs = 10v
? 2008 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 5 figure 5. forward bias safe operating area note: refer to fairchild application notes an7514 and an7515 figure 6. unclamped inductive switching capability figure 7. transfer characteristics figure 8. saturation characteristics figure 9. drain to source on resistance vs gate voltage and drain current figure 10. normalized drain to source on resistance vs junction temperature typical characteristics t c = 25c unless otherwise noted 0.1 1 10 100 400 11040 v ds , drain to source voltage (v) i d , drain current (a) t j = max rated t c = 25 o c single pulse limited by r ds(on) area may be operation in this 10 s 1ms dc 100 s 10ms 1 10 100 0.001 0.01 0.1 1 500 100 i as , avalanche current (a) t av , time in avalanche (ms) starting t j = 25 o c starting t j = 150 o c t av = (l)(i as )/(1.3*rated bv dss - v dd ) if r = 0 if r 0 t av = (l/r)ln[(i as *r)/(1.3*rated bv dss - v dd ) +1] 10 0 20 40 60 80 1.5 2.0 2.5 3.0 3.5 i d , drain current (a) v gs , gate to source voltage (v) pulse duration = 80 s duty cycle = 0.5% max v dd = 15v t j = 175 o c t j = -55 o c t j = 25 o c 4.0 0 40 80 120 160 0 0.25 0.5 0.75 1.0 i d , drain current (a) v ds , drain to source voltage (v) pulse duration = 80 s duty cycle = 0.5% max t c = 25 o c v gs = 10v v gs = 3.5v v gs = 3v v gs = 4.5v v gs = 2.5v 8 12 16 20 24681 0 i d = 5a v gs , gate to source voltage (v) i d = 54a r ds(on) , drain to source on resistance (m ? ) pulse duration = 80 s duty cycle = 0.5% max 0.7 0.85 1.02 1.19 1.36 1.53 -80 -40 0 40 80 120 160 200 normalized drain to source t j , junction temperature ( o c) on resistance v gs = 10v, i d = 54a pulse duration = 80 s duty cycle = 0.5% max 1.7
?200 8 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 6 figure 11. normalized gate threshold voltage vs junction temperature figure 12. normalized drain to source breakdown voltage vs junction temperature figure 13. capacitance vs drain to source voltage figure 14. gate charge waveforms for constant gate current typical characteristics t c = 25c unless otherwise noted 0.3 0.6 0.9 1.2 1.5 -80 -40 0 40 80 120 160 200 v gs = v ds , i d = 250 a normalized gate t j , junction temperature ( o c) threshold voltage 0.9 1.0 1.1 -80 -40 0 40 80 120 160 200 t j , junction temperature ( o c) normalized drain to source i d = 250 a breakdown voltage 1000 2000 0.1 1 10 30 100 c, capacitance (pf) v ds , drain to source voltage (v) v gs = 0v, f = 1mhz c iss = c gs + c gd c oss ? c ds + c gd c rss = c gd 0 2 4 6 8 10 0 5 10 15 20 25 v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15v i d = 54a i d = 5a waveforms in descending order:
?200 8 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 7 test circuits and waveforms figure 15. unclamped energy test circuit figure 16. unclamped energy waveforms figure 17. gate charge test circuit figure 18. gate charge waveforms figure 19. switching time test circuit figure 20. switching time waveforms t p v gs 0.01 ? l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v dd v ds bv dss t p i as t av 0 v gs + - v ds v dd dut i g(ref) l v dd q g(th) v gs = 1v q gs2 q g(tot) v gs = 10v v ds v gs i g(ref) 0 0 q gs q gd q g(5) v gs = 5v v gs r l r gs dut + - v dd v ds v gs t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0
?200 8 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 8 pspice electrical model .subckt fdp8880 2 1 3 ; rev october 2004 ca 12 8 9.5e-10 cb 15 14 9.5e-10 cin 6 8 1.15e-9 dbody 7 5 dbodymod dbreak 5 11 dbreakmod dplcap 10 5 dplcapmod ebreak 11 7 17 18 32.88 eds 14 8 5 8 1 egs 13 8 6 8 1 esg 6 10 6 8 1 evthres 6 21 19 8 1 evtemp 20 6 18 22 1 it 8 17 1 lgate 1 9 5.3e-9 ldrain 2 5 1.0e-9 lsource 3 7 1.7e-9 rlgate 1 9 53 rldrain 2 5 10 rlsource 3 7 17 mmed 16 6 8 8 mmedmod mstro 16 6 8 8 mstromod mweak 16 21 8 8 mweakmod rbreak 17 18 rbreakmod 1 rdrain 50 16 rdrainmod 1.0e-3 rgate 9 20 2.2 rslc1 5 51 rslcmod 1e-6 rslc2 5 50 1e3 rsource 8 7 rsourcemod 6.8e-3 rvthres 22 8 rvthresmod 1 rvtemp 18 19 rvtempmod 1 s1a 6 12 13 8 s1amod s1b 13 12 13 8 s1bmod s2a 6 15 14 13 s2amod s2b 13 15 14 13 s2bmod vbat 22 19 dc 1 eslc 51 50 value={(v(5,51)/abs(v(5,51)))*(pwr(v(5,51)/(1e-6*170),5))} .model dbodymod d (is=3e-12 ikf=10 n=1.01 rs=5e-3 trs1=8e-4 trs2=2e-7 + cjo=4.8e-10 m=0.55 tt=1e-11 xti=2) .model dbreakmod d (rs=0.2 trs1=1e-3 trs2=-8.8e-6) .model dplcapmod d (cjo=5.5e-10 is=1e-30 n=10 m=0.45) .model mstromod nmos (vto=2.10 kp=170 is=1e-30 n=10 tox=1 l=1u w=1u) .model mmedmod nmos (vto=1.75 kp=10 is=1e-30 n=10 tox=1 l=1u w=1u rg=2.2) .model mweakmod nmos (vto=1.39 kp=0.05 is=1e-30 n=10 tox=1 l=1u w=1u rg=22 rs=0.1) .model rbreakmod res (tc1=8.0e-4 tc2=-8e-7) .model rdrainmod res (tc1=-12e-3 tc2=.35e-4) .model rslcmod res (tc1=9e-4 tc2=1e-6) .model rsourcemod res (tc1=5e-3 tc2=1e-6) .model rvtempmod res (tc1=-2.78e-3 tc2=1.5e-6) .model rvthresmod res (tc1=-1e-3 tc2=-8.2e-6) model s1amod vswitch (ron=1e-5 roff=0.1 von=-4 voff=-3.5) .model s1bmod vswitch (ron=1e-5 roff=0.1 von=-3.5 voff=-4) .model s2amod vswitch (ron=1e-5 roff=0.1 von=-1.3 voff=-0.8) .model s2bmod vswitch (ron=1e-5 roff=0.1 von=-0.8 voff=-1.3) .ends note: for further discussion of the pspice model, consult a new pspice sub-circuit for the power mosfet featuring global temperature options ; ieee power electronics specialist conference records, 1991, written by william j. hepp and c. frank wheatley. 18 22 + - 6 8 + - 5 51 + - 19 8 + - 17 18 6 8 + - 5 8 + - rbreak rvtemp vbat rvthres it 17 18 19 22 12 13 15 s1a s1b s2a s2b ca cb egs eds 14 8 13 8 14 13 mweak ebreak dbody rsource source 11 7 3 lsource rlsource cin rdrain evthres 16 21 8 mmed mstro drain 2 ldrain rldrain dbreak dplcap eslc rslc1 10 5 51 50 rslc2 1 gate rgate evtemp 9 esg lgate rlgate 20 + - + - + - 6
?200 8 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 9 saber electrical model rev october 2004 template fdp8880 n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl=3e-12,ikf=10,nl=1.01,rs=5e-3,trs1=8e-4,trs2=2e-7,cjo=4.8e-10,m=0.55,tt=1e-11,xti=2) dp..model dbreakmod = (rs=0.2,trs1=1e-3,trs2=-8.8e-6) dp..model dplcapmod = (cjo=5.5e-10,isl=10e-30,nl=10,m=0.45) m..model mstrongmod = (type=_n,vto=2.10,kp=170,is=1e-30, tox=1) m..model mmedmod = (type=_n,vto=1.75,kp=10,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=1.39,kp=0.05,is=1e-30, tox=1,rs=0.1) sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-4,voff=-3.5) sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-3.5,voff=-4) sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-1.3,voff=-0.8) sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=-0.8,voff=-1.3) c.ca n12 n8 = 9.5e-10 c.cb n15 n14 = 9.5e-10 c.cin n6 n8 = 1.15e-9 dp.dbody n7 n5 = model=dbodymod dp.dbreak n5 n11 = model=dbreakmod dp.dplcap n10 n5 = model=dplcapmod spe.ebreak n11 n7 n17 n18 = 32.88 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 5.3e-9 l.ldrain n2 n5 = 1.0e-9 l.lsource n3 n7 = 1.7e-9 res.rlgate n1 n9 = 53 res.rldrain n2 n5 = 10 res.rlsource n3 n7 = 17 m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u res.rbreak n17 n18 = 1, tc1=8.0e-4,tc2=-8e-7 res.rdrain n50 n16 = 1.0e-3, tc1=-12e-3,tc2=.35e-4 res.rgate n9 n20 = 2.2 res.rslc1 n5 n51 = 1e-6, tc1=9e-4,tc2=1e-6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 6.8e-3, tc1=5e-3,tc2=1e-6 res.rvthres n22 n8 = 1, tc1=-1e-3,tc2=-8.2e-6 res.rvtemp n18 n19 = 1, tc1=-2.78e-3,tc2=1.5e-6 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/170))** 5))} } 18 22 + - 6 8 + - 19 8 + - 17 18 6 8 + - 5 8 + - rbreak rvtemp vbat rvthres it 17 18 19 22 12 13 15 s1a s1b s2a s2b ca cb egs eds 14 8 13 8 14 13 mweak ebreak dbody rsource source 11 7 3 lsource rlsource cin rdrain evthres 16 21 8 mmed mstro drain 2 ldrain rldrain dbreak dplcap iscl rslc1 10 5 51 50 rslc2 1 gate rgate evtemp 9 esg lgate rlgate 20 + - + - + - 6
?200 8 fairchild semiconductor corporation f dp8880 / fdb8880 rev. a 1 w ww.fairchildsemicom fdp8880 / fdb8880 10 pspice thermal model rev 23 december 2003 fdp8880t ctherm1 th 6 8e-4 ctherm2 6 5 1e-3 ctherm3 5 4 2.5e-3 ctherm4 4 3 2.6e-3 ctherm5 3 2 8e-3 ctherm6 2 tl 1.5e-2 rtherm1 th 6 1.44e-1 rtherm2 6 5 1.9e-1 rtherm3 5 4 3.0e-1 rtherm4 4 3 4.0e-1 rtherm5 3 2 5.7e-1 rtherm6 2 tl 5.8e-1 saber thermal model saber thermal model fdp8880t template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 6 =8e-4 ctherm.ctherm2 6 5 =1e-3 ctherm.ctherm3 5 4 =2.5e-3 ctherm.ctherm4 4 3 =2.6e-3 ctherm.ctherm5 3 2 =8e-3 ctherm.ctherm6 2 tl =1.5e-2 rtherm.rtherm1 th 6 =1.44e-1 rtherm.rtherm2 6 5 =1.9e-1 rtherm.rtherm3 5 4 =3.0e-1 rtherm.rtherm4 4 3 =4.0e-1 rtherm.rtherm5 3 2 =5.7e-1 rtherm.rtherm6 2 tl =5.8e-1 } rtherm4 rtherm6 rtherm5 rtherm3 rtherm2 rtherm1 ctherm4 ctherm6 ctherm5 ctherm3 ctherm2 ctherm1 tl 2 3 4 5 6 th junction case
rev. i34 trademarks the following includes registered and unregistered trademarks and service marks, owned by fair child semiconductor and/or its gl obal subsidianries, and is not intended to be an exhaustive list of all such trademarks. * ezswitch? and flashwriter ? are trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make ch anges without further no tice to any products herein to improve reliability, functio n, or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty ther ein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express writ ten approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonabl y expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failur e to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms acex ? build it now? coreplus? corepower? crossvolt ? ctl? current transfer logic? ecospark ? efficentmax? ezswitch? * ? fairchild ? fairchild semiconductor ? fact quiet series? fact ? fast ? fastvcore? flashwriter ? * fps? f-pfs? frfet ? global power resource sm green fps? green fps? e-series? gto? intellimax? isoplanar? megabuck? microcoupler? microfet? micropak? millerdrive? motionmax? motion-spm? optologic ? optoplanar ? ? pdp-spm? power-spm? powertrench ? programmable active droop? qfet ? qs? quiet series? rapidconfigure? saving our world 1mw at a time? smartmax? smart start? spm ? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 supermos? ? the power franchise ? tinyboost? tinybuck? tinylogic ? tinyopto? tinypower? tinypwm? tinywire? serdes? uhc ? ultra frfet? unifet? vcx? visualmax? ? tm tm datasheet identification product status definition advance information formative or in design this datasheet contains the design s pecifications for product development. specifications may change in any manner without notice. preliminary first production this datasheet contains preliminary data; supplementary data will be pub- lished at a later date. fairchild semi conductor reserves the right to make changes at any time without notice to improve design. no identification needed full production this datasheet contains final specifications. fairch ild semiconductor reserves the right to make changes at any time without notice to improve the design. obsolete not in production this datasheet contains s pecifications on a product that is discontinued by fairchild semiconductor. the datasheet is for reference information only. @2008 fairchild semiconductor corporation www. fairchildsemicom fdp8880 / fdb8880 rev.a1

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